Advancing EUV
Extreme ultraviolet lithography (EUV) has great potential for manufacturing
next-generation microprocessors with critical dimensions of 50 nm
or less. Thwarting its progress, however, has been the lack of EUV-test,
calibration, and quality control equipment that can be installed
and used on a clean room floor. This has driven James Underwood,
of EUV Technology, Martinez, Calif., to develop the EUV
Reflectometer Model No. LPR 1016-FS1515. The device measures
reflectivity and uniformity of multilayer coated mask blanks for
EUV lithography directly from a clean container using robotic transfer.
Prior to the development of the LPR 1016-FS1515, the reflectivity
and centroid wavelength of the masks were measured by transporting
them to a synchrotron radiation facility, a procedure which is inefficient
and time consuming. Moreover, due to particle contamination, mask
blanks also had to be re-cleaned prior to use, significantly increasing
the possibility of the masks incurring damage.
In contrast, the LPR 1016-FS1515 is configured to load and unload
reticles from a single-reticle SMIF pod using a robotic transfer
system. Since the mask blanks do not leave the clean environment
during measurement, they are not subject to the risk of particulate
contamination.
>>More info: www.euvl.com
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Integrating Semiconductor Temperature Monitoring
The single biggest variable influencing the profit margin of a
wafer fabrication line is yield. Yield depends on maintaining precise,
uniform temperature control across the entire wafer during the various
processing steps. Therefore, it is crucial to have a temperature-mapping
tool that reliably collects thermal data across the area of a standard
wafer without itself perturbing the thermal test environment. Researchers
at Oak Ridge National Laboratory, Tenn., in a joint effort with
SensArray Corp., Fremont, Calif., have offered up a solution with
the SensArray INtegrated Wafer, a fully integrated
wireless metrology system that responds like a production wafer.
The low profile, wireless design of the INtegrated Wafer allows
the user to conduct thermal surveys without modifying equipment
or disrupting production. With components embedded in the silicon
wafer, INtegrated Wafer produces a thermal mass and dynamic response
equivalent to that of a product wafer. It delivers precise, artifact-free
temperature data and highly repeatable run-to-run data in processes
from 15 to 145°C with ±0.1°C accuracy. It captures
both static and dynamic data for improved control of critical dimensions.
Advanced battery technology provides >100 hours of battery life.
Currently, the INtegrated Wafer is used in a variety of applications,
including lithography tracks, lithography steppers/scanners, low
temp deposition, and wafer probing.
>>More info: www.ornl.gov |
| Optimizing Silicon Processing
Given the tight supply of solar-grade silicon—the semiconductor
used in more than 90% of photovoltaic (PV) devices—it is a constant
concern that there will not be enough silicon to keep pace with demand.
A significant means of keeping up with demand while keeping prices low
is through improvements in the manufacturing process. Detecting impurities
and defects early in the PV production process increases the number of
efficient cells produced, boosts yields, and reduces manufacturing costs.
To that end, researchers at the National Renewable Energy Laboratory,
Golden, Colo., in a joint effort with Sinton Consulting, Inc., Boulder,
Colo., have developed the Sinton QSSPC Silicon Evaluation System.
The system quickly and accurately determines the quality of silicon starter
material by measuring minority-carrier lifetimes, impurities, resistivity,
and trapping. It tests the silicon boules and ingots before they are cut
into wafers, allowing the low-quality material to be cut and either discarded
or re-melted to improve quality. In addition, it also provides manufacturers
with information on two important properties: the crystalline quality
of the silicon and the concentration and electronic state of unwanted
impurities.
>>More info: www.nrel.gov
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High Resolution Optical Profiling
Optical profiling has long been a standard technique for non-contact,
high-speed, high resolution, 3D measurement of surface topography
of microelectromechanical systems (MEMS). Recently, the need to
understand packaged MEMS device performance has arisen. To address
this need, researchers at Veeco Instruments, Inc., Tucson, Ariz.,
developed the High-Resolution Technique for Measuring Through
Glass and Other Transparent Media. Through-glass measurement
allows researchers to apply the speed, repeatability, and resolution
of optical profiling for novel applications in MEMS, materials,
and life sciences.
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The through-glass technique combines novel objectives into an optical
profiler to accurately measure surface features of samples within
transparent packaging or environmental chambers. The objectives
have long working distances and employ novel methods for aberration
correction, shaped illumination, and dispersive compensation. They
allow for excellent fringe contrast, so the through-glass measurement
exhibits performance on par with standard optical profiling measurements.
Measurements take only a few seconds, so the method can be employed
for high-sample-rate production inspection.
The through-glass technique gives high-resolution measurements
with sub-Angstrom repeatability. It allows a standard optical profiler
to characterize samples through protective packaging, environmental
chamber windows, or other transparent media, giving researchers
insight into device performance and material behavior in situ, under
varying environmental conditions.
>>More info: www.veeco.com |
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