Smart Instruments Keep Up with Changing R&D Needs
New classes of ‘smart’ instruments are helping researchers on the leading edge
of technology reduce their cost of test while accelerating product development.
Semiconductor and passive component industries are continuously pushing their
development processes to higher levels of integration and complexity to keep pace
with consumer electronic needs. As the complexity of electronic devices grows,
and new materials are required, the amount and sophistication of testing increases.
Researchers and development engineers are faced with increasing pin counts on
new electronic devices, and a wider array of materials that must be evaluated
for possible use in these devices. In both cases, more measurement channels are
needed in test systems to maintain acceptable throughput and lower costs.
All of this takes place in a very dynamic environment. As soon as a new design goes into production, the development process starts over again with new materials, designs, and different test requirements. Design cycles keep getting shorter and shorter. Furthermore, in basic research, the hot study topics with available funding are always changing. Therefore, test hardware and software should be adaptable to the changing needs of this environment. Otherwise, new test systems may be needed, causing capital investment and the cost of test (COT) to escalate.
Good instrument design can help reduce test cycle time and COT, but that is only part of the story. Reducing COT in R&D also requires the testing of more devices simultaneously, using less bench space, and re-using test equipment more efficiently.
Smart system design
Managing system design to lower these costs requires efficient instrument integration, test techniques, and test routine development. The way individual instruments interact with a PC controller has a major impact on the efficiency of system design and operation—and ultimately on COT.
Factors to consider in designing automated test systems include:
• Multiple channels. Multichannel test systems with parallel test capabilities offer significant throughput advantages by allowing simultaneous testing of multiple materials or different sections of a complex device. Still, systems need to be scalable for effective management of capital investment costs.
• Software development. Depending on the instruments and other test equipment, developing test routines and a test executive to run them can be a major cost element. Instruments supplied with software that reduces programming time, or eliminates it altogether, have a major impact on lowering COT.
For example, some instrument manufacturers supply interactive software that allows users to quickly configure the system, run tests, generate current-voltage (I-V) curves, and analyze data without writing a single line of programming code.
• Modular instrument architecture. The pace of new component and material development makes it impractical, if not impossible, to design special systems for every new test requirement. Flexible, scalable, and reconfigurable systems are needed to test multiple device types and to handle new materials with minimal system redesign. A modular instrument architecture makes it possible to build a multi-channel system one day, and a few days later separate multiple instruments for use in different labs. Commercial test equipment with such flexibility eliminates the need for custom designed turnkey systems and maximizes equipment reuse.
• Test sequencer and memory. Instruments with a built-in sequencer and memory to run test routines with minimal PC control can improve throughput significantly. This type of design cuts down on data communications between the instruments and a test system controller and frees up the PC for other functions. Modern test sequencer instruments can store customized test routines with hundreds of steps that call up built-in functions such as a pulse generator, arbitrary waveform generator, I-V sweeps, or associated measurements for device-specific tests. However, making this work properly can be problematic when it entails multiple channels across multiple instruments. Some instrument designs make it much easier than others.
• System size. Higher pin counts and greater test complexity demand more measurement channels. This tends to increase the space needed for a bench or floor-mounted rack system, which has cost implications. Higher density instruments make it possible to pack more source and measurement channels into the limited space allocated to a test lab.
Until recently, few solutions were optimized for multichannel source-measure applications. Test engineers were often forced to choose between:
1. Relatively simple, but slow instrument-based systems using PC control.
2. Faster, but complex instrument-based systems using custom trigger, digital input/output (I/O), and communication controllers.
3. Highly integrated and speedy mainframe systems that were neither cost-effective nor space-efficient.
Today, “smart” source-measure units (SMUs) offer a fourth alternative that combines
a built-in test sequencer with the scalability and flexibility of rack-and-stack
instruments, providing the integration and high throughput of mainframe-based
systems. They can handle multiple channels easily and provide high-speed, nonstop
testing in R&D and production environments.
Flexible multi-function designs
Smart, single-box SMUs are available that combine a power supply, a digital multimeter (DMM), and precision bias source, along with a low frequency pulse generator and arbitrary waveform generator. This simplifies testing and reduces costs by allowing a single instrument to be used in many different ways. These smart instruments also have an on-board processor and bundled software so they can perform many test functions without having to communicate with a remote controller via a general purpose interface bus (GPIB). In addition, they have a simple programming interface that allows users to quickly develop high-speed, multichannel test sequences without writing a lot of test routine code.
Because these instruments have no mainframe restrictions, users can typically create integrated test systems with up to 64 nodes, which can be scaled up to 128 SMU channels. These features support the development of optimized systems at significantly lower cost per channel and overall smaller capital investment. Communications between test equipment and the system controller can be a significant throughput bottleneck. To avoid consuming valuable test time, command and data transfers are commonly done while a prober or handler performs mechanical operations. However, this arrangement is less viable as test systems grow increasingly more complex and require more controller/instrument interaction. The processor and software embedded in smart SMUs allow entire test programs to be downloaded into one instrument in the system, which then controls its own operation and that of the other instruments via a high-speed interface.
Programs can be downloaded into either the volatile or nonvolatile memory of one “master” unit. That unit controls its own operation and that of all its “slave” units as though they were a single instrument. This capability frees the system controller to interface with other instruments more frequently, increasing overall system throughput. Further, modern SMUs have significant amounts of memory, which also reduces how often the host controller needs to interact with them.
Master and slave units can be connected via a combined high speed, serial communication bus and hardware trigger lines (TSP-Link) that form an inter-instrument real-time control and data exchange interface. This peer-to-peer interface provides communications only between instruments, and does not require communications between the instruments and a host computer. It operates with a simpler message exchange protocol and much lower overhead than conventional interfaces, resulting in speeds approximately ten times faster than those of the GPIB.
Lowering R&D test costs
SMUs with built-in programming capability lower tests costs by reducing test and development times. They also save bench and rack space by requiring fewer individual instruments and by occupying a smaller footprint.
Shorter test times. After devices or samples are loaded into a test fixture, several time intervals account for the bulk of total test cycle time:
• Sourcing, settling, and measurement times
• Range change times for source-measure instrumentation
• Trigger delay between separate instruments or between a PC controller and the instruments
• Data communication times for test commands, digital I/O, triggers, and moving collected data to storage or PC memory
• Program execution time needed to compare measurements with acceptable limits or other measurements, and then exercise pass/fail or other logic functions.
Complex testing may require the application of multiple source signals and response measurements for each device under test (DUT). Therefore, the first way to improve test time is to switch from individual instruments to integrated SMUs. This cuts trigger delay and data communication times. With internal program memory, data communication time and test program latencies drop further because the SMU can run the test sequences.
The latest SMU designs have program memory large enough to run hundreds of predefined tests, make limit comparisons, perform conditional test program branching, and work with or without a PC controller during test execution. There is no question that these SMUs can significantly improve test times for single-channel systems.
Reducing test time is more complicated in systems employing multiple SMUs because of the difficulty in managing multiple triggers and the test sequencer. As a result, some SMUs intended for multiple instrument systems may have a test sequencer that simply stores multiple GPIB commands, which can be executed with a single SCPI (Standard Commands for Programmable Instrumentation) call from the PC controller. However, this arrangement does not provide the logic needed to perform efficient limit testing and make pass/fail decisions. It also involves a great deal of GPIB traffic on the data communications bus. In addition, these SMUs may not be as effective as they should be in multiple channel testing, because they access channels sequentially, instead of in parallel. Therefore, throughput improvement is marginal.
The fastest SMUs combine a test sequencer with an on-board script processor and high-speed control bus that allows master-slave operation of multiple SMUs in a true parallel channel arrangement. This results in a multiple SMU system with throughput gains much higher than those of single-channel sequencers. In some cases, multiple SMUs connected with a control bus can be used as if they are part of the same physical unit for simultaneous multichannel testing, compared to sequentially accessing multiple SMU channels.
Shorter development time. Software development has always been a major portion of total system cost, especially in complex test systems, and those based on mainframe designs. The software structure in smart SMUs provides a much simpler programming interface for test sequencing across multiple SMUs and channels, which can now be treated as if they were all part of a single entity. This shortens program development time significantly.
Besides their relatively low cost, script-based SMU systems are highly flexible.
They can be integrated seamlessly into a scalable “mainframeless” system with
the high throughput of a multichannel, card-based system. These systems can be
easily customized for different applications, and evolve as test requirements
change. Users can standardize on one or two SMU models and reconfigure them by
simply changing test scripts. Creating and changing the test scripts is also easy
with the embedded software tools that come with smart SMUs. For example, Keithley’s
LabTracer software (supplied with its 2600 Series SMUs) allows quick, no-programming
instrument start-up for I-V characterization and curve tracing. Multiple SMUs
can be configured and controlled with a single keystroke for fast device parameter
tests and data plots. For high-speed production applications, the Keithley Test
Script Builder uses an uncomplicated command language similar to BASIC to create
and modify customized code for an SMU’s test script processor. The 2600 Series
also have a built-in suite of pre-written programs that can be quickly modified
for specific applications. Studies have shown that by using these instruments
and their associated software, users can cut system development time by 50% to
75% compared to previous generations of test sequencing instruments.
Reduced footprint. Newer SMUs are available in 2U half-rack designs that substantially improve rack density. Systems capable of handling 128 channels are possible and sufficient for many high pin count devices. Moreover, scalable and easily integrated rack-and-stack test system designs are now possible. Rack-and-stack systems eliminate mainframe overhead, reducing the cost of test system hardware. They also occupy a smaller footprint, which generally equates to lower ownership cost in space-strapped facilities. Modern source-measure units, capable of sourcing either voltage or current and simultaneously measuring voltage and current provide a convenient “one box” package for testing multipin electronic devices, and for the simultaneous testing of multiple samples. They provide significantly higher throughput than conventional set-ups, including mainframe systems with test sequencing capabilities. They can be used to build flexible test platforms that dramatically reduce test time and cost, and can be reconfigured easily to meet changing test needs.
—Dale Cigoy Senior Applications Engineer, Keithley Instruments, Inc.
Click to enalrge. |
All of this takes place in a very dynamic environment. As soon as a new design goes into production, the development process starts over again with new materials, designs, and different test requirements. Design cycles keep getting shorter and shorter. Furthermore, in basic research, the hot study topics with available funding are always changing. Therefore, test hardware and software should be adaptable to the changing needs of this environment. Otherwise, new test systems may be needed, causing capital investment and the cost of test (COT) to escalate.
Good instrument design can help reduce test cycle time and COT, but that is only part of the story. Reducing COT in R&D also requires the testing of more devices simultaneously, using less bench space, and re-using test equipment more efficiently.
Smart system design
Managing system design to lower these costs requires efficient instrument integration, test techniques, and test routine development. The way individual instruments interact with a PC controller has a major impact on the efficiency of system design and operation—and ultimately on COT.
Factors to consider in designing automated test systems include:
• Multiple channels. Multichannel test systems with parallel test capabilities offer significant throughput advantages by allowing simultaneous testing of multiple materials or different sections of a complex device. Still, systems need to be scalable for effective management of capital investment costs.
• Software development. Depending on the instruments and other test equipment, developing test routines and a test executive to run them can be a major cost element. Instruments supplied with software that reduces programming time, or eliminates it altogether, have a major impact on lowering COT.
For example, some instrument manufacturers supply interactive software that allows users to quickly configure the system, run tests, generate current-voltage (I-V) curves, and analyze data without writing a single line of programming code.
• Modular instrument architecture. The pace of new component and material development makes it impractical, if not impossible, to design special systems for every new test requirement. Flexible, scalable, and reconfigurable systems are needed to test multiple device types and to handle new materials with minimal system redesign. A modular instrument architecture makes it possible to build a multi-channel system one day, and a few days later separate multiple instruments for use in different labs. Commercial test equipment with such flexibility eliminates the need for custom designed turnkey systems and maximizes equipment reuse.
• Test sequencer and memory. Instruments with a built-in sequencer and memory to run test routines with minimal PC control can improve throughput significantly. This type of design cuts down on data communications between the instruments and a test system controller and frees up the PC for other functions. Modern test sequencer instruments can store customized test routines with hundreds of steps that call up built-in functions such as a pulse generator, arbitrary waveform generator, I-V sweeps, or associated measurements for device-specific tests. However, making this work properly can be problematic when it entails multiple channels across multiple instruments. Some instrument designs make it much easier than others.
• System size. Higher pin counts and greater test complexity demand more measurement channels. This tends to increase the space needed for a bench or floor-mounted rack system, which has cost implications. Higher density instruments make it possible to pack more source and measurement channels into the limited space allocated to a test lab.
Until recently, few solutions were optimized for multichannel source-measure applications. Test engineers were often forced to choose between:
1. Relatively simple, but slow instrument-based systems using PC control.
2. Faster, but complex instrument-based systems using custom trigger, digital input/output (I/O), and communication controllers.
3. Highly integrated and speedy mainframe systems that were neither cost-effective nor space-efficient.
Click to enlarge. |
Flexible multi-function designs
Smart, single-box SMUs are available that combine a power supply, a digital multimeter (DMM), and precision bias source, along with a low frequency pulse generator and arbitrary waveform generator. This simplifies testing and reduces costs by allowing a single instrument to be used in many different ways. These smart instruments also have an on-board processor and bundled software so they can perform many test functions without having to communicate with a remote controller via a general purpose interface bus (GPIB). In addition, they have a simple programming interface that allows users to quickly develop high-speed, multichannel test sequences without writing a lot of test routine code.
Because these instruments have no mainframe restrictions, users can typically create integrated test systems with up to 64 nodes, which can be scaled up to 128 SMU channels. These features support the development of optimized systems at significantly lower cost per channel and overall smaller capital investment. Communications between test equipment and the system controller can be a significant throughput bottleneck. To avoid consuming valuable test time, command and data transfers are commonly done while a prober or handler performs mechanical operations. However, this arrangement is less viable as test systems grow increasingly more complex and require more controller/instrument interaction. The processor and software embedded in smart SMUs allow entire test programs to be downloaded into one instrument in the system, which then controls its own operation and that of the other instruments via a high-speed interface.
Programs can be downloaded into either the volatile or nonvolatile memory of one “master” unit. That unit controls its own operation and that of all its “slave” units as though they were a single instrument. This capability frees the system controller to interface with other instruments more frequently, increasing overall system throughput. Further, modern SMUs have significant amounts of memory, which also reduces how often the host controller needs to interact with them.
Master and slave units can be connected via a combined high speed, serial communication bus and hardware trigger lines (TSP-Link) that form an inter-instrument real-time control and data exchange interface. This peer-to-peer interface provides communications only between instruments, and does not require communications between the instruments and a host computer. It operates with a simpler message exchange protocol and much lower overhead than conventional interfaces, resulting in speeds approximately ten times faster than those of the GPIB.
Lowering R&D test costs
SMUs with built-in programming capability lower tests costs by reducing test and development times. They also save bench and rack space by requiring fewer individual instruments and by occupying a smaller footprint.
Shorter test times. After devices or samples are loaded into a test fixture, several time intervals account for the bulk of total test cycle time:
• Sourcing, settling, and measurement times
• Range change times for source-measure instrumentation
• Trigger delay between separate instruments or between a PC controller and the instruments
• Data communication times for test commands, digital I/O, triggers, and moving collected data to storage or PC memory
• Program execution time needed to compare measurements with acceptable limits or other measurements, and then exercise pass/fail or other logic functions.
Complex testing may require the application of multiple source signals and response measurements for each device under test (DUT). Therefore, the first way to improve test time is to switch from individual instruments to integrated SMUs. This cuts trigger delay and data communication times. With internal program memory, data communication time and test program latencies drop further because the SMU can run the test sequences.
The latest SMU designs have program memory large enough to run hundreds of predefined tests, make limit comparisons, perform conditional test program branching, and work with or without a PC controller during test execution. There is no question that these SMUs can significantly improve test times for single-channel systems.
Reducing test time is more complicated in systems employing multiple SMUs because of the difficulty in managing multiple triggers and the test sequencer. As a result, some SMUs intended for multiple instrument systems may have a test sequencer that simply stores multiple GPIB commands, which can be executed with a single SCPI (Standard Commands for Programmable Instrumentation) call from the PC controller. However, this arrangement does not provide the logic needed to perform efficient limit testing and make pass/fail decisions. It also involves a great deal of GPIB traffic on the data communications bus. In addition, these SMUs may not be as effective as they should be in multiple channel testing, because they access channels sequentially, instead of in parallel. Therefore, throughput improvement is marginal.
The fastest SMUs combine a test sequencer with an on-board script processor and high-speed control bus that allows master-slave operation of multiple SMUs in a true parallel channel arrangement. This results in a multiple SMU system with throughput gains much higher than those of single-channel sequencers. In some cases, multiple SMUs connected with a control bus can be used as if they are part of the same physical unit for simultaneous multichannel testing, compared to sequentially accessing multiple SMU channels.
Shorter development time. Software development has always been a major portion of total system cost, especially in complex test systems, and those based on mainframe designs. The software structure in smart SMUs provides a much simpler programming interface for test sequencing across multiple SMUs and channels, which can now be treated as if they were all part of a single entity. This shortens program development time significantly.
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Reduced footprint. Newer SMUs are available in 2U half-rack designs that substantially improve rack density. Systems capable of handling 128 channels are possible and sufficient for many high pin count devices. Moreover, scalable and easily integrated rack-and-stack test system designs are now possible. Rack-and-stack systems eliminate mainframe overhead, reducing the cost of test system hardware. They also occupy a smaller footprint, which generally equates to lower ownership cost in space-strapped facilities. Modern source-measure units, capable of sourcing either voltage or current and simultaneously measuring voltage and current provide a convenient “one box” package for testing multipin electronic devices, and for the simultaneous testing of multiple samples. They provide significantly higher throughput than conventional set-ups, including mainframe systems with test sequencing capabilities. They can be used to build flexible test platforms that dramatically reduce test time and cost, and can be reconfigured easily to meet changing test needs.
—Dale Cigoy Senior Applications Engineer, Keithley Instruments, Inc.
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